A conventional multi-chip package includes a plurality of chips which are electrically connected to a leadframe and sealed inside a molding compound. The leads of leadframe cannot perform as the redistributed traces in the substrate that can be flexibly routed. When the plurality of chips share the same power source, ground plane or signal paths, it is practically not easy to connect the chips to a common lead through bonding wires so that the only way is to create extra traces routing in the outer printed circuit board to connect the common leads after surface-mounting the package.
R.O.C. Taiwan Patent No. 448,518 entitled “multi-chip package with leadframe” discloses a multi-chip package utilizing a leadframe. An internal substrate, such as a printed wiring board, is disposed inside the molding compound as an electrical interconnection between the leadframe and the plurality of chips. Therefore, electrical interconnection for common leads can be achieved without the need of redesigning the bonding pads of the chips. However, the internal substrate is attached to the leads of the leadframe and sealed inside the molding compound, the multi-chip package becomes thicker and the package cost becomes higher.